1. Technical Field
The present invention relates generally to power management in processing systems, and more particularly, to a power management scheme that includes local bounding and control of device power consumption within a processing system.
2. Description of the Related Art
Present-day computing systems include sophisticated power-management schemes for a variety of reasons. For portable computers such as “notebook”, “laptop” and other portable units including personal digital assistants (PDAs), the primary power source is battery power. Intelligent power management extends battery life, and therefore the amount of time that a user can operate the system without connecting to a secondary source of power. Power management has also been implemented over “green systems” concerns so that power dissipated within a building is reduced for reasons of energy conservation and heat reduction.
Recently, power management has become a requirement in line power connected systems, particularly high processing power cores and systems because the components and/or systems are now designed with total potential power consumption levels that either exceed power dissipation limits of individual integrated circuits or cabinets, or the total available power supply is not designed to be adequate for operation of all units simultaneously. For example, a processor may be designed with multiple execution units that cannot all operate simultaneously due to either an excessive power dissipation level or a problem in distributing the requisite current level throughout the processor without excessive voltage drop.
However, power management of system components typically introduces latency/availability problems in that recovery from a power saving state involves overhead that reduces processing throughput. Further, traditional memory allocation schemes within operating systems tend to exacerbate the problem by spreading frequently accessed memory locations throughout available memory. Memory allocation and processor-managed power management techniques have been proposed and implemented that alleviate this problem to some degree, but fall short of ideal due to the lack of information or latency of information about actual memory use that could otherwise provide for more efficient power management of infrequently used memory that is allocated for a running process.
At the operating system level, information about changes in power consumption by a device is not as readily available as at the device or device controller level. Further, typical control of power management states of devices by the operating system falls short of the level of power-management responsiveness that may be provided at the device or device controller level. But, control schemes that are only local in nature may not meet a required power consumption limitation that enables operation of a processing system within a current power availability or thermal state. In general, global power availability or overall system temperature is used to dictate a global power limit. For example, in battery-operated systems, overall power availability is dictated by available battery energy. While discrete thermal measurements are possible within a processing system, in general one hotspot, for example a processor package temperature, is used to dictate a limit on power dissipation within a system.
Further, severe power consumption shifts, as occur when a device or group of devices changes power management state simultaneously, generate current spikes that can cause interference disrupting operation of the devices or overall processing system. Therefore, it is desirable to control power consumption within a system so that large changes in power consumption are avoided.
It is therefore desirable to provide a method and system for providing power management within a processing system, and in particular within a memory subsystem, that can control a globally-dictated level of power consumption by providing responsive local control of the power management states of devices. It would further be desirable to provide such control without introducing current spikes due to large shifts in overall power consumption.